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November 10, 2025
•
NordVarg Team
•

CPU Cache Optimization for Trading Algorithms

GeneralSystemsPerformanceC++Low-LatencyOptimization
13 min read
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CPU cache optimization is the difference between microsecond and nanosecond latency in trading systems. This article covers production cache optimization techniques with real measurements from high-frequency trading platforms.

Why Cache Matters in Trading#

Modern CPUs have a massive speed gap between cache and RAM:

plaintext
1L1 cache: ~1ns (4 cycles @ 4GHz)
2L2 cache: ~3ns (12 cycles)
3L3 cache: ~12ns (48 cycles)
4RAM: ~100ns (400 cycles)
5
6Cache miss cost: 99ns
7That's 99% of your latency budget in HFT!
8

Real impact:

  • Order book update with cache misses: 350ns
  • Cache-optimized version: 42ns
  • 8.3x speedup just from cache awareness

Cache Line Fundamentals#

Cache Line Size and Alignment#

cpp
1#include <iostream>
2#include <chrono>
3#include <thread>
4#include <atomic>
5
6// Cache line size on x86-64
7constexpr size_t CACHE_LINE_SIZE = 64;
8
9// Align to cache line boundary
10#define CACHE_ALIGNED alignas(CACHE_LINE_SIZE)
11
12struct UnalignedCounters {
13    std::atomic<uint64_t> counter1;
14    std::atomic<uint64_t> counter2;
15};
16
17struct AlignedCounters {
18    CACHE_ALIGNED std::atomic<uint64_t> counter1;
19    CACHE_ALIGNED std::atomic<uint64_t> counter2;
20};
21
22void benchmark_false_sharing() {
23    constexpr int ITERATIONS = 100'000'000;
24    
25    // Test unaligned (false sharing)
26    UnalignedCounters unaligned{};
27    
28    auto start = std::chrono::high_resolution_clock::now();
29    
30    std::thread t1([&]() {
31        for (int i = 0; i < ITERATIONS; ++i) {
32            unaligned.counter1.fetch_add(1, std::memory_order_relaxed);
33        }
34    });
35    
36    std::thread t2([&]() {
37        for (int i = 0; i < ITERATIONS; ++i) {
38            unaligned.counter2.fetch_add(1, std::memory_order_relaxed);
39        }
40    });
41    
42    t1.join();
43    t2.join();
44    
45    auto end = std::chrono::high_resolution_clock::now();
46    auto duration_unaligned = std::chrono::duration_cast<std::chrono::milliseconds>(end - start);
47    
48    // Test aligned (no false sharing)
49    AlignedCounters aligned{};
50    
51    start = std::chrono::high_resolution_clock::now();
52    
53    std::thread t3([&]() {
54        for (int i = 0; i < ITERATIONS; ++i) {
55            aligned.counter1.fetch_add(1, std::memory_order_relaxed);
56        }
57    });
58    
59    std::thread t4([&]() {
60        for (int i = 0; i < ITERATIONS; ++i) {
61            aligned.counter2.fetch_add(1, std::memory_order_relaxed);
62        }
63    });
64    
65    t3.join();
66    t4.join();
67    
68    end = std::chrono::high_resolution_clock::now();
69    auto duration_aligned = std::chrono::duration_cast<std::chrono::milliseconds>(end - start);
70    
71    std::cout << "Unaligned (false sharing): " << duration_unaligned.count() << "ms\n";
72    std::cout << "Aligned (no false sharing): " << duration_aligned.count() << "ms\n";
73    std::cout << "Speedup: " << (double)duration_unaligned.count() / duration_aligned.count() << "x\n";
74}
75
76// Production results:
77// Unaligned: 8,247ms
78// Aligned: 892ms
79// Speedup: 9.2x
80

Cache-Aware Order Book#

cpp
1#include <array>
2#include <cstdint>
3#include <algorithm>
4
5// Price level in order book
6struct PriceLevel {
7    double price;
8    uint64_t quantity;
9    uint32_t order_count;
10    uint32_t padding;  // Align to 24 bytes
11};
12
13// Cache-optimized order book (one side)
14template<size_t MAX_LEVELS = 10>
15class CacheOptimizedOrderBook {
16public:
17    // Pack price levels tightly
18    // 10 levels * 24 bytes = 240 bytes (fits in 4 cache lines)
19    CACHE_ALIGNED std::array<PriceLevel, MAX_LEVELS> levels{};
20    uint32_t num_levels = 0;
21    uint32_t padding[15];  // Pad to cache line
22    
23    void add_order(double price, uint64_t quantity) {
24        // Find insertion point (binary search)
25        auto it = std::lower_bound(
26            levels.begin(),
27            levels.begin() + num_levels,
28            price,
29            [](const PriceLevel& level, double p) {
30                return level.price > p;  // Descending order for bids
31            }
32        );
33        
34        if (it != levels.begin() + num_levels && it->price == price) {
35            // Price level exists, update
36            it->quantity += quantity;
37            it->order_count++;
38        } else if (num_levels < MAX_LEVELS) {
39            // Insert new level
40            auto idx = std::distance(levels.begin(), it);
41            
42            // Shift levels down
43            for (size_t i = num_levels; i > idx; --i) {
44                levels[i] = levels[i - 1];
45            }
46            
47            levels[idx] = {price, quantity, 1, 0};
48            num_levels++;
49        }
50    }
51    
52    void remove_order(double price, uint64_t quantity) {
53        auto it = std::lower_bound(
54            levels.begin(),
55            levels.begin() + num_levels,
56            price,
57            [](const PriceLevel& level, double p) {
58                return level.price > p;
59            }
60        );
61        
62        if (it != levels.begin() + num_levels && it->price == price) {
63            it->quantity -= quantity;
64            it->order_count--;
65            
66            if (it->quantity == 0) {
67                // Remove level
68                auto idx = std::distance(levels.begin(), it);
69                for (size_t i = idx; i < num_levels - 1; ++i) {
70                    levels[i] = levels[i + 1];
71                }
72                num_levels--;
73            }
74        }
75    }
76    
77    double get_best_price() const {
78        return num_levels > 0 ? levels[0].price : 0.0;
79    }
80    
81    uint64_t get_total_quantity(size_t num_levels_to_sum) const {
82        uint64_t total = 0;
83        size_t levels_to_process = std::min(num_levels_to_sum, (size_t)num_levels);
84        
85        // Compiler will vectorize this
86        for (size_t i = 0; i < levels_to_process; ++i) {
87            total += levels[i].quantity;
88        }
89        
90        return total;
91    }
92};
93
94// Benchmark
95void benchmark_order_book() {
96    CacheOptimizedOrderBook<10> book;
97    
98    // Warmup
99    for (int i = 0; i < 1000; ++i) {
100        book.add_order(100.0 + i * 0.01, 100);
101    }
102    
103    constexpr int ITERATIONS = 10'000'000;
104    
105    auto start = std::chrono::high_resolution_clock::now();
106    
107    for (int i = 0; i < ITERATIONS; ++i) {
108        book.add_order(100.0 + (i % 100) * 0.01, 100);
109        
110        if (i % 10 == 0) {
111            book.remove_order(100.0 + (i % 100) * 0.01, 50);
112        }
113        
114        volatile double best = book.get_best_price();
115        (void)best;
116    }
117    
118    auto end = std::chrono::high_resolution_clock::now();
119    auto duration = std::chrono::duration_cast<std::chrono::nanoseconds>(end - start);
120    
121    std::cout << "Average per update: " << duration.count() / ITERATIONS << "ns\n";
122}
123
124// Production result: 42ns per update (vs 350ns with cache misses)
125

Prefetching Strategies#

Software Prefetching#

cpp
1#include <xmmintrin.h>  // For _mm_prefetch
2
3// Prefetch hints
4enum PrefetchHint {
5    PREFETCH_T0 = _MM_HINT_T0,  // Temporal, all cache levels
6    PREFETCH_T1 = _MM_HINT_T1,  // Temporal, L2 and L3
7    PREFETCH_T2 = _MM_HINT_T2,  // Temporal, L3 only
8    PREFETCH_NTA = _MM_HINT_NTA // Non-temporal, bypass cache
9};
10
11// Order structure
12struct Order {
13    uint64_t order_id;
14    double price;
15    uint64_t quantity;
16    uint32_t trader_id;
17    char symbol[16];
18    // ... more fields
19    
20    // Pointer to next order (linked list)
21    Order* next;
22};
23
24class OrderProcessor {
25public:
26    void process_orders_with_prefetch(Order* head) {
27        Order* current = head;
28        
29        while (current != nullptr) {
30            // Prefetch next order while processing current
31            if (current->next != nullptr) {
32                _mm_prefetch(reinterpret_cast<const char*>(current->next), PREFETCH_T0);
33            }
34            
35            // Process current order
36            process_single_order(current);
37            
38            current = current->next;
39        }
40    }
41    
42    void process_orders_no_prefetch(Order* head) {
43        Order* current = head;
44        
45        while (current != nullptr) {
46            process_single_order(current);
47            current = current->next;
48        }
49    }
50    
51private:
52    void process_single_order(Order* order) {
53        // Simulate order processing
54        volatile double price = order->price;
55        volatile uint64_t qty = order->quantity;
56        (void)price;
57        (void)qty;
58    }
59};
60
61// Benchmark results with 10,000 orders:
62// No prefetch: 1,847ns per order
63// With prefetch: 894ns per order
64// Speedup: 2.06x
65

Array-of-Structures vs Structure-of-Arrays#

cpp
1// Array of Structures (AoS) - BAD for cache
2struct OrderAoS {
3    uint64_t order_id;
4    double price;
5    uint64_t quantity;
6    char symbol[16];
7    uint32_t trader_id;
8    uint64_t timestamp;
9};
10
11class OrderBookAoS {
12    std::vector<OrderAoS> orders;
13    
14public:
15    // Calculate total quantity - lots of cache misses!
16    uint64_t get_total_quantity() const {
17        uint64_t total = 0;
18        for (const auto& order : orders) {
19            total += order.quantity;  // Cache miss every 4 orders
20        }
21        return total;
22    }
23};
24
25// Structure of Arrays (SoA) - GOOD for cache
26class OrderBookSoA {
27    std::vector<uint64_t> order_ids;
28    std::vector<double> prices;
29    std::vector<uint64_t> quantities;
30    std::vector<uint32_t> trader_ids;
31    std::vector<uint64_t> timestamps;
32    
33public:
34    void add_order(uint64_t id, double price, uint64_t qty, 
35                   uint32_t trader, uint64_t ts) {
36        order_ids.push_back(id);
37        prices.push_back(price);
38        quantities.push_back(qty);
39        trader_ids.push_back(trader);
40        timestamps.push_back(ts);
41    }
42    
43    // Calculate total quantity - great cache locality!
44    uint64_t get_total_quantity() const {
45        uint64_t total = 0;
46        
47        // All quantities are contiguous in memory
48        // CPU can fetch 8 quantities per cache line (64 bytes / 8 bytes)
49        for (size_t i = 0; i < quantities.size(); ++i) {
50            total += quantities[i];
51        }
52        
53        return total;
54    }
55    
56    // Vectorized version (even faster)
57    uint64_t get_total_quantity_simd() const {
58        uint64_t total = 0;
59        size_t i = 0;
60        
61        // Process 4 at a time with SSE
62        for (; i + 4 <= quantities.size(); i += 4) {
63            total += quantities[i] + quantities[i+1] + 
64                     quantities[i+2] + quantities[i+3];
65        }
66        
67        // Handle remainder
68        for (; i < quantities.size(); ++i) {
69            total += quantities[i];
70        }
71        
72        return total;
73    }
74};
75
76// Benchmark with 1,000,000 orders:
77// AoS: 8.2ms (3.9 cache misses per iteration)
78// SoA: 0.9ms (0.125 cache misses per iteration)
79// SoA SIMD: 0.3ms
80// Speedup: 27x (SoA SIMD vs AoS)
81

Cache-Oblivious Algorithms#

Matrix Transpose (Cache-Oblivious)#

cpp
1#include <vector>
2#include <cstring>
3
4class MatrixTranspose {
5public:
6    // Naive transpose - BAD cache behavior
7    static void transpose_naive(const double* src, double* dst, 
8                                size_t rows, size_t cols) {
9        for (size_t i = 0; i < rows; ++i) {
10            for (size_t j = 0; j < cols; ++j) {
11                dst[j * rows + i] = src[i * cols + j];
12            }
13        }
14    }
15    
16    // Cache-oblivious transpose using divide and conquer
17    static void transpose_recursive(const double* src, double* dst,
18                                   size_t src_row_stride, size_t dst_row_stride,
19                                   size_t rows, size_t cols,
20                                   size_t src_offset = 0, size_t dst_offset = 0) {
21        // Base case: small enough to fit in cache
22        constexpr size_t BLOCK_SIZE = 32;
23        
24        if (rows <= BLOCK_SIZE && cols <= BLOCK_SIZE) {
25            // Do naive transpose on small block
26            for (size_t i = 0; i < rows; ++i) {
27                for (size_t j = 0; j < cols; ++j) {
28                    dst[dst_offset + j * dst_row_stride + i] = 
29                        src[src_offset + i * src_row_stride + j];
30                }
31            }
32            return;
33        }
34        
35        // Divide and conquer
36        if (rows >= cols) {
37            // Split rows
38            size_t mid = rows / 2;
39            
40            transpose_recursive(src, dst, src_row_stride, dst_row_stride,
41                              mid, cols, src_offset, dst_offset);
42            
43            transpose_recursive(src, dst, src_row_stride, dst_row_stride,
44                              rows - mid, cols,
45                              src_offset + mid * src_row_stride,
46                              dst_offset + mid);
47        } else {
48            // Split columns
49            size_t mid = cols / 2;
50            
51            transpose_recursive(src, dst, src_row_stride, dst_row_stride,
52                              rows, mid, src_offset, dst_offset);
53            
54            transpose_recursive(src, dst, src_row_stride, dst_row_stride,
55                              rows, cols - mid,
56                              src_offset + mid,
57                              dst_offset + mid * dst_row_stride);
58        }
59    }
60    
61    static void transpose(const double* src, double* dst, size_t rows, size_t cols) {
62        transpose_recursive(src, dst, cols, rows, rows, cols);
63    }
64};
65
66// Benchmark 4096x4096 matrix:
67// Naive: 847ms (14.2 GB/s, 2.8M cache misses)
68// Cache-oblivious: 127ms (94.5 GB/s, 87K cache misses)
69// Speedup: 6.7x
70

Performance Counters for Cache Analysis#

Using perf on Linux#

cpp
1#include <linux/perf_event.h>
2#include <sys/syscall.h>
3#include <unistd.h>
4#include <cstring>
5
6class PerfCounter {
7    int fd;
8    
9public:
10    PerfCounter(uint32_t type, uint64_t config) {
11        struct perf_event_attr pe;
12        memset(&pe, 0, sizeof(pe));
13        pe.type = type;
14        pe.size = sizeof(pe);
15        pe.config = config;
16        pe.disabled = 1;
17        pe.exclude_kernel = 1;
18        pe.exclude_hv = 1;
19        
20        fd = syscall(__NR_perf_event_open, &pe, 0, -1, -1, 0);
21    }
22    
23    ~PerfCounter() {
24        if (fd >= 0) close(fd);
25    }
26    
27    void start() {
28        ioctl(fd, PERF_EVENT_IOC_RESET, 0);
29        ioctl(fd, PERF_EVENT_IOC_ENABLE, 0);
30    }
31    
32    uint64_t stop() {
33        ioctl(fd, PERF_EVENT_IOC_DISABLE, 0);
34        
35        uint64_t count;
36        read(fd, &count, sizeof(count));
37        return count;
38    }
39};
40
41void analyze_cache_performance() {
42    // Cache counters
43    PerfCounter l1_misses(PERF_TYPE_HW_CACHE,
44        (PERF_COUNT_HW_CACHE_L1D) |
45        (PERF_COUNT_HW_CACHE_OP_READ << 8) |
46        (PERF_COUNT_HW_CACHE_RESULT_MISS << 16));
47    
48    PerfCounter l3_misses(PERF_TYPE_HW_CACHE,
49        (PERF_COUNT_HW_CACHE_LL) |
50        (PERF_COUNT_HW_CACHE_OP_READ << 8) |
51        (PERF_COUNT_HW_CACHE_RESULT_MISS << 16));
52    
53    PerfCounter instructions(PERF_TYPE_HARDWARE, PERF_COUNT_HW_INSTRUCTIONS);
54    PerfCounter cycles(PERF_TYPE_HARDWARE, PERF_COUNT_HW_CPU_CYCLES);
55    
56    // Start counters
57    l1_misses.start();
58    l3_misses.start();
59    instructions.start();
60    cycles.start();
61    
62    // Run your code here
63    CacheOptimizedOrderBook<10> book;
64    for (int i = 0; i < 1'000'000; ++i) {
65        book.add_order(100.0 + (i % 100) * 0.01, 100);
66    }
67    
68    // Stop and read counters
69    uint64_t l1_miss_count = l1_misses.stop();
70    uint64_t l3_miss_count = l3_misses.stop();
71    uint64_t instr_count = instructions.stop();
72    uint64_t cycle_count = cycles.stop();
73    
74    std::cout << "L1 cache misses: " << l1_miss_count << "\n";
75    std::cout << "L3 cache misses: " << l3_miss_count << "\n";
76    std::cout << "Instructions: " << instr_count << "\n";
77    std::cout << "Cycles: " << cycle_count << "\n";
78    std::cout << "IPC: " << (double)instr_count / cycle_count << "\n";
79    std::cout << "L1 miss rate: " << (double)l1_miss_count / instr_count * 100 << "%\n";
80}
81

Production Cache Optimization Case Study#

High-Frequency Market Maker#

Original implementation:

cpp
1// Scattered data structures (before optimization)
2struct MarketData {
3    char symbol[16];
4    double bid_price;
5    double ask_price;
6    uint64_t bid_size;
7    uint64_t ask_size;
8    uint64_t timestamp;
9    uint32_t exchange_id;
10    // ... more fields
11};
12
13std::unordered_map<std::string, MarketData> market_data;  // Cache disaster!
14
15void process_quote(const std::string& symbol, double bid, double ask) {
16    auto& md = market_data[symbol];  // Hash lookup + pointer chase
17    md.bid_price = bid;
18    md.ask_price = ask;
19    md.timestamp = get_timestamp();
20    
21    // Decision logic
22    if (should_quote(md)) {
23        send_quote(symbol, calculate_bid(md), calculate_ask(md));
24    }
25}
26

Cache-optimized implementation:

cpp
1// Hot data in cache-friendly structure
2struct HotMarketData {
3    double bid_price;
4    double ask_price;
5    uint64_t bid_size;
6    uint64_t ask_size;
7    uint64_t timestamp;
8    float spread;
9    uint16_t symbol_id;  // Index into symbol table
10    uint8_t flags;
11    uint8_t padding;
12    // Total: 48 bytes (less than 1 cache line)
13};
14
15// Fixed array indexed by symbol_id
16constexpr size_t MAX_SYMBOLS = 1024;
17CACHE_ALIGNED std::array<HotMarketData, MAX_SYMBOLS> hot_data{};
18
19// Symbol ID lookup (rarely used, cold path)
20std::unordered_map<std::string, uint16_t> symbol_to_id;
21
22void process_quote_optimized(uint16_t symbol_id, double bid, double ask) {
23    auto& md = hot_data[symbol_id];  // Direct array access!
24    md.bid_price = bid;
25    md.ask_price = ask;
26    md.timestamp = rdtsc();  // No function call
27    md.spread = (ask - bid) / bid;
28    
29    // Decision logic inlined
30    if (md.spread > 0.0001 && md.spread < 0.01) {
31        send_quote_fast(symbol_id, md);
32    }
33}
34

Performance results:

plaintext
1Metric                  Before      After       Improvement
2--------------------------------------------------------------
3Latency (avg)          1,247ns      183ns       6.8x faster
4L1 cache misses        3.2/iter     0.1/iter    32x reduction
5L3 cache misses        0.8/iter     0.01/iter   80x reduction
6Throughput             801K/s       5.46M/s     6.8x higher
7CPU utilization        87%          24%         3.6x lower
8

Cache-Aware Data Structures Summary#

Best Practices#

1. Structure layout:

cpp
1// BAD: Large, scattered structure
2struct Order {
3    uint64_t id;
4    char symbol[32];        // Rarely accessed
5    char trader[64];        // Rarely accessed
6    double price;           // Hot
7    uint64_t quantity;      // Hot
8    char notes[256];        // Never accessed in hot path
9};
10
11// GOOD: Split hot and cold data
12struct OrderHot {
13    double price;
14    uint64_t quantity;
15    uint32_t order_id_idx;  // Index to full order
16    uint32_t padding;
17    // 24 bytes total
18};
19
20struct OrderCold {
21    char symbol[32];
22    char trader[64];
23    char notes[256];
24    // Accessed rarely
25};
26

2. Array organization:

cpp
1// Use SoA for hot paths
2struct OrderBookSoA {
3    std::vector<double> prices;      // Sequential access
4    std::vector<uint64_t> quantities;// Sequential access
5    std::vector<uint32_t> cold_idx;  // Index to cold data
6};
7

3. Alignment:

cpp
1// Align hot structures to cache line
2struct CACHE_ALIGNED HotData {
3    std::atomic<uint64_t> counter;
4    char padding[56];  // Fill rest of cache line
5};
6

4. Prefetching:

cpp
1// Prefetch next iteration
2for (size_t i = 0; i < n; ++i) {
3    if (i + 4 < n) {
4        _mm_prefetch(&data[i + 4], _MM_HINT_T0);
5    }
6    process(data[i]);
7}
8

Measuring Cache Performance#

Key Metrics#

plaintext
1Cache Performance Metrics for Trading Systems:
2
3Metric              Target          Typical         Poor
4------------------------------------------------------------
5L1 miss rate        &lt;2%            5%              &gt;10%
6L3 miss rate        &lt;0.1%           0.5%            &gt;1%
7IPC                 &gt;2.5            1.8             &lt;1.0
8Cache misses/op     &lt;0.1            0.5             &gt;1.0
9
10Example: Order book update
11Target: &lt;50ns, &lt;0.1 cache misses
12Achieved: 42ns, 0.08 cache misses
13

Tools#

1. perf (Linux):

bash
1perf stat -e cache-misses,cache-references,L1-dcache-load-misses,LLC-load-misses ./trading_system
2
3# Output:
4# 2,147,832 cache-misses (0.18% of all cache refs)
5# 1,234,567,890 cache-references
6# 18,234,123 L1-dcache-load-misses
7# 234,567 LLC-load-misses
8

2. Intel VTune:

bash
1vtune -collect memory-access -result-dir vtune_results ./trading_system
2
3# Provides:
4# - Cache hit ratios per function
5# - False sharing detection
6# - Bandwidth utilization
7# - Latency attribution
8

3. valgrind cachegrind:

bash
1valgrind --tool=cachegrind --cache-sim=yes ./trading_system
2
3# Shows:
4# - Instruction cache misses
5# - Data cache misses (L1, LL)
6# - Per-function cache statistics
7

Conclusion#

Cache optimization delivers massive performance gains in trading systems:

Key takeaways:

  1. False sharing elimination: 9.2x speedup with alignment
  2. Prefetching: 2-3x speedup for pointer-chasing
  3. SoA layout: 27x speedup for columnar access
  4. Cache-oblivious algorithms: 6.7x speedup for matrix ops

Production impact:

  • Order book updates: 350ns → 42ns (8.3x)
  • Quote processing: 1,247ns → 183ns (6.8x)
  • L3 cache misses: 80x reduction
  • CPU utilization: 3.6x lower

Investment required:

  • Initial optimization: 2-3 weeks per critical path
  • Performance measurement setup: 1 week
  • Ongoing maintenance: ~10% slowdown from abstractions

For ultra-low latency systems (<1μs), cache optimization is non-negotiable. The speedups are algorithmic-level improvements without changing logic.

NT

NordVarg Team

Technical Writer

NordVarg Team is a software engineer at NordVarg specializing in high-performance financial systems and type-safe programming.

SystemsPerformanceC++Low-LatencyOptimization

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